VNL5E1024M32M-64S

Venuchip · LPDDR · · Extended (-25~85°C)

Compiled specifications

Compiled by the MemSignal team from publicly available information
ParameterValue
Part numberVNL5E1024M32M-64S
Density / capacity1024M × 32 (two 16 Gb dies in package = 32 Gb / 4 GB)
Speed / gradeLPDDR5, 6400 Mb/s per pin
Supply voltageVDD1 1.80 V; VDD2H 1.05 V; VDD2L 0.90 V; VDDQ 0.50 V (0.30 V with ODT off)
Operating temperature-25°C to +85°C
Product lineLPDDR5 mobile DRAM
Lifecycle—

Blank rows are omitted rather than filled with a guess.

The Venuchip VNL5E1024M32M-64S is a mobile LPDDR5 SDRAM in the 1024M × 32 organization (two 16 Gb dies stacked in package, for 32 Gb — about 4 GB per package), running up to 6400 Mb/s per pin.

Key figures

  • Organization: 1024M × 32 across two channels; the package block diagram shows a dual-die, dual-channel, single-rank build (16 Gb per die, 17,179,869,184 bits).
  • Data rate: 6400 Mb/s per pin, with a 12.8 GB/s maximum bandwidth per channel and a WCK:CK ratio of 4:1.
  • Architecture: LPDDR5, 16n-bit / 32n-bit prefetch, 8-bank / bank-group / 16-bank modes; optional link ECC.
  • Supplies: VDD1 1.80 V (1.70–1.95 V), VDD2H 1.05 V (1.01–1.12 V), VDD2L 0.90 V, VDDQ 0.50 V (0.30 V with ODT off).
  • Package: 315-ball TFBGA, 12.4 mm × 15.0 mm, 1.1 mm seated height maximum (package code DS).
  • Operating temperature: -25°C to +85°C (as stated in the datasheet feature list).
  • Mode-register manufacturer ID: MR5 = 1111 1111b, listed as Venuchip.

What this document says about grade

The datasheet lists an operating temperature of -25°C to +85°C and we tag the part accordingly as Extended. This is a temperature range only — it is not a vehicle-grade qualification. The document expressly disclaims vehicle-grade use unless the vendor specifically designates this ordering code as vehicle-grade, so no vehicle-grade qualification is asserted anywhere on this page.

Provenance

Every figure above is taken from Venuchip “315ball x32 LPDDR5 SDRAM” 18 页 · md5 39870e58255749060329a0a04972736e · /Info Author=Micron/Creator=WPS(版式派生件,见 N85), a channel-local copy (cover, feature overview, Table 1 ordering information, package dimensions and the mode-register definition). Its PDF document properties name a foreign manufacturer and a third-party word processor as the producing tools, which is consistent with a compatible-second-source house re-typesetting the product spec rather than a manufacturer-hosted original; because no byte-identical manufacturer-hosted public copy has been verified, the manufacturer datasheet button is left unpopulated and the file is not hosted here.

Who makes it

Venuchip is the storage brand of 启铭芯科技有限公司 (Chinese brand name 启铭芯), which its own company profile states was established in 2016, with a research and development center in Taiwan and global operations in Shenzhen. The company describes itself as focused on the design, research, packaging and testing of memory products, and its VNL-prefix mobile LPDDR parts are positioned as pin-to-pin compatible substitutes for mainstream-brand components; this ordering code appears in the manufacturer’s own published mobile-DRAM model list.

Cross-references & alternatives

No substitution list published for this part

A cross-reference here would change what a customer buys. We publish one only when each row carries a source and a date and has been checked by a named reviewer.

  • Table shape: Alternative · Fit · Differs in · Source · Checked
  • Blocked on: an engineering review step with a named reviewer per row

Official documentation

MemSignal does not host, reproduce or distribute datasheets. Where the manufacturer publishes one, we link to it.

Provenance

  • Source: Venuchip "315ball x32 LPDDR5 SDRAM" 18 页 · md5 39870e58255749060329a0a04972736e · /Info Author=Micron/Creator=WPS(版式派生件,见 N85)
  • Checked: 2026-10-16

Cross-reference and substitution advice appear only where each claim carries a source and a date.

Parameters not compiled for this part

  • Typical applications
  • Country of origin

Listed so the gap is visible on the page, not inferred later.

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